Maicon S. Cardoso

Maicon S. Cardoso

Ph.D. in Computer Science and B.Eng. in Electrical Engineering.

Publications

Full publication list here (resumé in Portuguese).

2020

  • Cardoso, M., Bubolz, A., Cortadella, J., Rosa Jr., L. and Marques, F. Transistor Placement for Automatic Cell Synthesis through Boolean Satisfiability. In: Proceedings of the 53th IEEE International Symposium of Circuits and Systems (53th IEEE ISCAS), 2020, Seville. Link.

2018

  • Cardoso, M., Smaniotto, G., Bubolz, A., Moreira, M., Rosa Jr., L. and Marques, F. Libra: an Automatic Design Methodology for CMOS Complex Gates. IEEE Transactions on Circuits and Systems II-Express Briefs, v. 65, 2018. Link.
  • Cardoso, M., Smaniotto, G., Bubolz, A., Rosa Jr., L. and Marques, F. Area-Aware Design of Static CMOS Complex Gates. In: Proceedings of the 16th IEEE International New Circuits and Systems Conference (16th IEEE NEWCAS), 2018, Montreal. Link.

2017

  • Smaniotto, G., Zanandrea, R., Cardoso, M., Souza, R., Moreira, M., Marques, F. and Rosa Jr., L. A post-processing methodology to improve the automatic design of CMOS gates at layout-level. In: Proceedings of the 24th IEEE International Conference on Electronics, Circuits and Systems (ICECS) (24th IEEE ICECS), 2017, Batumi. Link.
  • Ávila, C., Cavalheiro, S., Bordini, A., Marques, M., Cardoso, M. and Feijó, G. Metodologias de avaliação do Pensamento Computacional: uma revisão sistemática. In: Proceedings of the XXVIII Brazilian Symposium on Informatics in Education (XVIII SBIE), 2017, Recife. Link (paper in Portuguese).
  • Cardoso, M., Smaniotto, G., Machado, J., Moreira, M., Rosa Jr., L. and Marques, F. Transistor Placement Strategies for Non-Series-Parallel Cells. In: Proceedings of the 60th IEEE International Midwest Symposium on Circuits and Systems (60th IEEE MWSCAS), 2017, Boston. Link.
  • Smaniotto, G., Zanandrea, R., Cardoso, M., Souza, R., Moreira, M., Marques, F. and Rosa Jr., L. Post-Processing of Supergate Networks Aiming Cell Layout Optimization. In: Proceedings of the 50th IEEE International Symposium of Circuits and Systems (50th IEEE ISCAS), 2017, Baltimore. Link.

2016

  • Cardoso, M., Smaniotto, G., Zanandrea, R., Souza, R., Rosa Jr., L. and Marques, F. Physical Design of Supergate Cells Aiming Geometrical Optimizations. In: Proceedings of the 59th IEEE International Midwest Symposium on Circuits and Systems (59th IEEE MWSCAS), 2016, Abu Dhabi. Link.

  • Cardoso, M., Zanandrea, R., Souza, R., Machado, J., Rosa Jr., L. and Marques, F. Topological Characteristics of Logic Networks Generated by a Graph-based Methodology. In: Proceedings of the 7th IEEE Latin American Symposium on Circuits & Systems (7th IEEE LASCAS), 2016, Florianópolis. Link.

2015

  • Cardoso, M., Rosa Jr., L. and Marques, F. Evaluating Geometric Aspects of Non-Series-Parallel Cells. In: Proceedings of the 28th Symposium on Integrated Circuits and Systems Design (28th SBCCI), 2015, Salvador. Link.